1. Technical Field
The present invention relates to a light emitting device, a method of driving the light emitting device, and an electronic apparatus.
2. Related Art
Recently, various light emitting devices which employ light emitting elements such as organic EL (ElectroLuminescent) elements and organic light emitting diodes (hereinafter, referred to as “OLED”) elements called light emitting polymer elements have been proposed.
For example, a light emitting device using a pixel circuit P0 shown in FIG. 20 is disclosed in JP-A-2008-122632. As shown in FIG. 20, the pixel circuit P0 has a driving transistor 3B and a light emitting element 3D which are connected in series between a supply line DSL101 and a ground line 3H, a sampling transistor 3A provided between a gate of the driving transistor 3B and a signal line DTL101, and a capacitance element 3C. The sampling transistor 3A is turned on according to a control signal supplied from a scanning line WSL101. A driving circuit (main scanner) driving the pixel circuit P0 performs a compensation operation during a plurality of horizontal scanning periods H prior to sampling of signal potential, to keep a voltage corresponding to a threshold voltage of the driving transistor 3B in the capacitance element 3C. Hereinafter, details thereof will be described with reference to FIG. 21.
The timing chart of FIG. 21 is divided into periods (B) to (L) according to transition of an operation of the pixel circuit P0. In the light emitting period (B), the light emitting element 3D is in a light emitting state. Thereafter, when the process enters the period (C), a new field period is started, the potential of the supply line DSL101 may be switched from high potential Vcc_H to low potential Vcc_L. In the low potential Vcc_L, since the voltage between both ends of the light emitting element 3B is set to a value less than a light emitting threshold voltage, the light emitting element 3D is in a non-light emitting state. Then, when the process proceeds to the period (D), a first horizontal scanning period H is started. In the period (D), the potential of the scanning line WSL101 is transited to the high level, and the potential of the signal line DTL101 is set to reference potential Vo. Accordingly, the potential of the gate of the driving transistor 3B is set to the reference potential Vo. Since the difference voltage between the reference potential Vo and the potential Vcc_L is set to a value sufficiently greater than the threshold voltage of the driving transistor 3B, potential of a source of the driving transistor 3B is set (initialized) to Vcc_L. Then, when the process proceeds to the compensation period (E), a first compensation operation is performed. More specifically, the potential of the supply line DSL 101 is set from the low potential Vcc_L to the high potential Vcc_H, the potential of the source of the driving transistor 3B starts rising, and the voltage between the gate and the source of the driving transistor 3B gradually approaches to the threshold voltage. Subsequently, when the process enters the period (F) of the latter half of the horizontal scanning period H, the potential of the signal line DTL101 is set to signal potential Vin. In this period (F), since the pixel circuit of the other line performs sampling of the signal potential Vin, the potential of the scanning line WSL101 is set to the low level, and the sampling transistor 3A is turned off.
Then, when a second horizontal scanning period H is started, the first half thereof becomes the compensation period (G) again, the potential of the signal line DTL101 is set to the reference potential Vo, the potential of the scanning line WSL101 is set to the high level, and a second compensation operation is performed. In the latter half period (H), since the pixel circuit of the other line performs sampling, the potential of the signal line DTL101 is set to the signal potential Vin, and the potential of the scanning line WSL101 is set to the low level. Then, when a third horizontal scanning period H is started, the first half thereof becomes the compensation period (I) again, a third compensation operation is performed. Subsequently, when the process proceeds to the period (J), the potential of the signal line DTL101 is set to the signal potential Vin. When the process proceeds to the sampling period (K), the potential of the scanning line WSL101 is set to the high level, the sampling transistor 3A is turned on, the gate potential of the driving transistor 3B is set to the signal potential Vin. Accordingly, since current flows into capacitance corresponding to the OLED element 3D according to the signal potential Vin, the potential of the source of the driving transistor 3B rises, and a mobility compensation operation is performed by negative feedback. Thereafter, when the process enters the light emitting period (L), the potential of the scanning line WSL101 is set to the low level, the sampling transistor 3A is turned off, and the gate of the driving transistor 3B enters an electrically floating state. The current corresponding to the voltage between both ends of the capacitance element 3C flows in the driving transistor 3B, the potential of the source of the driving transistor 3B rises, and the potential of the gate of the driving transistor 3B rises according to the potential of the source (bootstrap operation). When the potential of the source of the driving transistor 3B is higher than the light emitting threshold value, the light emitting element 3D emits light.
However, in the JP-A-2008-122632, the compensation operation is performed during the plurality of horizontal scanning periods H prior to the sampling of the signal potential Vin, and thus a length of time of the light emitting period becomes shorter. Accordingly, in the technique disclosed in JP-A-2008-122632, there is a problem that it is difficult to sufficiently secure the length of time of the light emitting period.